High G Packaging

High-g Packaging and Miniaturization of Electronics for Deeply Integrated Inertial Guidance Units

Advanced weapon systems such as the Long Range Land Attack Projectile (LRLAP) must meet stringent mission requirements in the areas of lethality and collateral damage. The Land Attack Projectile (LRLAP) utilized in conjunction with the Navy’s Advanced Gun System (AGS) – critical to the overall success of the DDG 1000. The trends in electronics of ever increasing miniaturization on top of a generally decreasing cost curve can be exploited in the precision guided munitions (PGM) arena. Therefore, it is of supreme importance to develop packaging techniques that allow electronics modules to withstand the high-g forces encountered during a gun launch.

Honeywell’s BG1930G deeply integrated Inertial Navigation System – Global Positioning System with Anti-Jam capability (INS-GPS/AJ) product has been baselined as the primary production navigation, flight control, and mission computer for LRLAP This program will study the packaging of the BG1930G or similar product from the point of view of assessing its survivability to different gun launch environments, as well as suggesting improvements to the design. Another aspect of this program is the application of multi-chip module (MCM) technology to the discrete semiconductor approach used in the BG1930G, hereafter referred to System On a Chip (SOC). The strategy behind SOC is the integration of electronic subsystem functions (e.g. transmit, receive, modulation, control, etc.) into a single die whereby significantly reducing size, weight, and cost and in some cases enabling a significant performance enhancement with a weapon system. Through this enhanced level of integration, higher clock speeds and data transmission rates can be achieved; providing the warfighter lighter weight electronic products with significantly enhanced performance capability.

The SOC approach is to combine the mission processor, inertial sensor assembly interface, digital anti-jam functions, user serial interface, and corresponding electronics functions onto 1 - 2 substrates. Development and incorporation of SOC technology will effectively eliminate an entire printed wiring board from the product baseline, and enable the achievement of aggressive Average Unit Production Pricing objectives, producibility, reliability, weight, and volume objectives mandated by LRLAP and other Joint Navy / USAF program applications.